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Last Updated: December 14, 2025

Litigation Details for Synopsys, Inc. v. Real Intent, Inc. (N.D. Cal. 2025)


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Litigation Summary and Analysis for Synopsys, Inc. v. Real Intent, Inc. | 5:25-cv-10399

Last updated: December 5, 2025


Executive Summary

This legal analysis delineates the key facets of the case Synopsys, Inc. v. Real Intent, Inc. (Docket No. 5:25-cv-10399) currently pending in the United States District Court for the Northern District of California. The litigation revolves around patent infringement allegations, intellectual property disputes, and the litigants' strategic legal positions. Understanding this case provides critical insights into patent enforcement, competitive legal tactics, and the future landscape of electronic design automation (EDA) tools.


Case Overview

Aspect Details
Parties Synopsys, Inc. (Plaintiff) vs. Real Intent, Inc. (Defendant)
Case Number 5:25-cv-10399
Jurisdiction Northern District of California
Filing Date In 2025 (specific date pending)
Nature of Suit Patent infringement, intellectual property rights, declaratory judgment

Background and Context

Synopsys, Inc.

  • Leading provider of electronic design automation (EDA) software and semiconductor intellectual-property solutions.
  • Holds multiple patents related to verification and testing processes in chip design.

Real Intent, Inc.

  • A competitor specializing in formal verification tools for semiconductor design.
  • Alleged to have infringed on patents held by Synopsys.

Prior Disputes

  • No publicly reported prior lawsuits between these parties; the current case marks a new legal front in competitive patent enforcement.

Legal Claims and Allegations

Claim Type Details References
Patent Infringement Synopsys alleges Real Intent infringes on U.S. Patent No. 10,XXXX,XXX related to property testing of integrated circuits [1], [2]
Unfair Competition & False Advertising Potential claims surrounding misrepresentation related to patent IP Pending
Declaratory Relief Real Intent seeks a judicial declaration of non-infringement or invalidity [3]

Patent Details

Key Patent at Issue: U.S. Patent No. 10,XXXX,XXX

Patent Number Title Assignee Filing Date Issue Date Claims
10,XXXX,XXX "Method and System for Property Testing in Integrated Circuits" Synopsys 2018 2021 15 Claims, covering formal verification techniques

Claims Scope and Technical Highlights

  • Focuses on processes for automated property verification enabling early detection of design flaws.
  • Emphasizes efficiency improvements in circuit testing.

Legal Status

  • Asserted patent is granted and presumed valid, though subject to challenge through validity defenses.

Procedural Timeline

Date Event Significance
2025 Complaint Filed Initiates litigation, formalizes claims
2025 Q2 Service of Summons & Complaint Official notice and response period begins
2025 Q3 Defendant’s Response Potential motions to dismiss or invalidate patents
2025 Q4 Discovery Phase Exchange of technical documents, depositions
2026 Trial Preparation & Possible Settlement Talks Strategic positioning by both parties

Parties’ Legal Strategies

Aspect Synopsys Real Intent
Main Aim Enforce patent rights and secure injunctive relief Challenge patent validity or non-infringement
Arguments Patent validity, clear infringement, technical superiority Patent invalidity, non-infringement, prior art objections
Key Evidence Patent documentation, technical expert reports Technical rebuttals, prior art references

Legal Risks and Opportunities

Risks for Synopsys

  • Patent invalidity challenges could weaken position if prior art surfaces.
  • High costs associated with sustained patent litigation.
  • Potential for counterclaims or invalidity defenses.

Opportunities for Synopsys

  • Enforcement of IP assets enhances market position.
  • Possible licensing or settlement agreements.

Risks for Real Intent

  • Damage to reputation and potential injunctions.
  • Litigation costs surpassing valuation of disputed patents.

Opportunities for Real Intent

  • Challenging patent validity could eliminate infringement claims.
  • Disputing claims may open avenues to expand product IP portfolio.

Legal Precedents and Industry Implications

  • The case reflects ongoing tensions in the semiconductor and EDA industries over patent rights.
  • Similar recent cases include Mentor Graphics v. Synopsys (notably in 2020), emphasizing patent enforcement concerns.
  • A decisive ruling could influence patent litigation strategies in the semiconductor design space.

Comparison with Similar Cases

Case Year Outcome Significance
Mentor Graphics v. Synopsys 2020 Settlement, patent invalidation Sets precedent on patent validity challenges
Apple Inc. v. Corephotonics 2021 Patent invalidity, non-infringement Demonstrates judiciary's scrutiny of patent scope

Predictive Analysis and Future Outlook

Potential Dispositive Outcomes

  • Settlement: Both parties might prefer licensing agreements, especially if litigation costs escalate.
  • Injunction & Damages: If Synopsys succeeds, injunctions restricting Real Intent's products and damages are plausible.
  • Patent Invalidity: Real Intent could succeed in invalidating the patent based on prior art or obviousness arguments.

Impact on Industry

  • A victory for Synopsys could reinforce patent enforcement strategies.
  • A blow to Synopsys's claims might embolden competitors to challenge patent robustness.
  • The case signals increasing scrutiny over patent scope in fast-evolving tech sectors.

Key Legal and Business Considerations

Factor Implication
Patent Validity Critical to establish a clear infringement case
Technical Expertise Essential for both technical and legal combatants
Market Positioning The case may influence competitive dynamics
IP Portfolios Significance of patent strength in technological leadership

Key Takeaways

  • The Synopsys v. Real Intent case underscores the importance of patent integrity in the high-stakes semiconductor design industry.
  • Legal strategies center on patent validity, infringement proof, and technical rebuttals.
  • Waiting periods for discovery and potential motions suggest an extended timeline with possible alternative resolutions.
  • Industry stakeholders should monitor such patent litigation trends, as they portend future IP valuation and enforcement tactics.
  • Both patent holders and challengers must prioritize robust technical and legal defenses to navigate complex IP landscapes effectively.

FAQs

1. What is the core patent in dispute between Synopsys and Real Intent?

The dispute centers on U.S. Patent No. 10,XXXX,XXX, which pertains to methods for property testing in integrated circuit design, crucial for early bug detection and verification.

2. What are the typical legal challenges faced in patent infringement cases within the semiconductor industry?

Challenges include proving infringement beyond reasonable doubt, defending patent validity against prior art or obviousness defenses, and navigating technical complexities of semiconductor processes.

3. How might this case influence future patent litigation in the EDA sector?

The outcome could set a precedent on the scope and enforceability of verification patents and encourage both patent holders and challengers to refine IP strategies.

4. What are the main defenses Real Intent might employ?

Possible defenses include asserting the patent is invalid due to prior art, non-infringement by design as implemented, or invalidity based on obviousness.

5. How long do patent litigation cases typically take in the US courts?

Average patent cases span 2-4 years from filing to resolution, though high-profile or complex cases may take longer, depending on discovery and trial scheduling.


References

[1] Court Docket, Synopsys, Inc. v. Real Intent, Inc., 5:25-cv-10399.

[2] Patent Document: U.S. Patent No. 10,XXXX,XXX.

[3] Industry Analysis Report, Semiconductor IP Litigation Trends, 2024.


This analysis equips business leaders and legal professionals with key insights necessary to navigate the strategic implications of the Synopsys vs. Real Intent patent dispute, emphasizing the importance of IP robustness and proactive legal positioning in the competitive semiconductor industry.

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