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Details for Patent: 6,608,343

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Details for Patent: 6,608,343

Title: Rough (high surface area) electrode from Ti and TiN, capacitors and semiconductor devices including same
Abstract:A technique for forming a high surface area electrode or storage node for a capacitor and devices formed thereby, including depositing a first layer of conductive material on a substrate, such that a discontinuous layer is formed. A second conductive material layer is deposited over the discontinuous first conductive material layer, such that the second conductive material layer grows or accumulates on the discontinuous first conductive material layer at a faster rate than on the exposed areas of the substrate in the discontinuous first conductive material layer to form a rough conductive material layer.
Inventor(s): Derderian; Garo J. (Boise, ID), Sandhu; Gurtej S. (Boise, ID)
Assignee: Micron Technology, Inc. (Boise, ID)
Filing Date:Dec 05, 2001
Application Number:10/005,850
Claims:1. A storage node comprising: a discontinuous first material layer on a substrate, wherein the discontinuous first material layer defines at least one area exposing a portion of the substrate therethrough; and a second material layer over the discontinuous first material layer and the at least one area, wherein the second material layer exhibits a first thickness over the discontinuous first material layer and a second, lesser thickness over the at least one area defined by the discontinuous first material layer.

2. The storage node of claim 1, wherein the at least one exposed area includes a plurality of areas, each exposing a different portion of the substrate therethrough.

3. The storage node of claim 1, wherein the discontinuous first material layer and the second material layer are both conductive layers.

4. The storage node of claim 3, wherein the discontinuous first material layer and the second material layer both exhibit the same material composition.

5. The storage node of claim 1, wherein the discontinuous first material layer is formed of a nonconductive material and the second material layer is formed of a conductive material.

6. The storage node of claim 1, wherein the discontinuous first material layer is formed of a semiconductive material and the second material layer is formed of a conductive material.

7. The storage node of claim 1, wherein at least one of the discontinuous first material layer and the second material layer comprises at least one of Ti, TiN, TiSi.sub.2, TiAlN, Ta, TaN, TaSi.sub.2, Mo, MoN, W, WN, WSi.sub.2, NiCr, Ir, IrO.sub.2, RuO.sub.2, SrRuO.sub.2, Pt and PtRh.

8. The storage node of claim 1, further comprising a dielectric layer over the second material layer.

9. A random access memory device comprising: at least one memory cell having at least one capacitor storage node wherein the at least one capacitor storage node comprises: a discontinuous first material layer on a substrate, wherein the discontinuous first material layer defines at least one area exposing a portion of the substrate therethrough; and a second material layer over the discontinuous first material layer and the at least one area, wherein the second material layer exhibits a first thickness over the discontinuous first material layer and a second, lesser thickness over the at least one area defined by the discontinuous first material layer.

10. The random access memory device of claim 9, wherein the at least one exposed area includes a plurality of areas, each exposing a different portion of the substrate therethrough.

11. The random access memory device of claim 9, wherein the discontinuous first material layer and the second material layer are both conductive layers.

12. The random access memory device of claim 11, wherein the discontinuous first material layer and the second material layer both exhibit the same material composition.

13. The random access memory device of claim 9, wherein the discontinuous first material layer is formed of a nonconductive material and the second material layer is formed of a conductive material.

14. The random access memory device of claim 9, wherein the discontinuous first material layer is formed of a semiconductive material and the second material layer is formed of a conductive material.

15. The random access memory device of claim 9, wherein at least one of the discontinuous first material layer and the second material layer comprises at least one of Ti, TiN, TiSi.sub.2, TiAlN, Ta, TaN, TaSi.sub.2, Mo, MoN, W, WN, WSi.sub.2, NiCr, Ir, IrO.sub.2, RuO.sub.2, SrRuO.sub.2, Pt and PtRh.

16. The random access memory device of claim 9, further comprising a dielectric layer over the second material layer.
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